The inventions relate to semiconductor devices and, more particularly, to vertical semiconductor devices.
Semiconductor devices have become over time more highly integrated in order to provide increasingly improved performance and lower cost. The integration density of semiconductor devices is a primary factor that directly influences the costs of the semiconductor devices. The area that a unit memory cell occupies mainly determines the integration density of a conventional two-dimensional (2D) memory. Improvement in the integration density of conventional 2D memory devices is greatly affected by the technology for forming fine patterns for which the dimensions are typically measured in nanometers. Extremely high-priced equipment is needed in order to form these fine patterns, however, and while the integration density of 2D memory devices continues to increase, there are practical and economic limits that affect this technology.
Three-dimensional (3D) semiconductor devices including three-dimensionally arranged blocks of memory cells have been proposed to address the above issues. However, production of 3D semiconductor memory devices is expensive when compared with 2D semiconductor memory devices, and there are concerns regarding providing reliable product characteristics.